Integrated Circuits
Monday, August 30, 2010
UltraSPARC T3
Sun Microsystems' UltraSPARC T3 microprocessor (codenamed "Rainbow Falls", also known as UltraSPARC KT) is a future multithreading, multi-core CPU. It is a member of the SPARC family, and the successor to the UltraSPARC T2.
In October 2006, Sun disclosed that Niagara 3 will be built with a 45 nm process. An online IT publication, The Register incorrectly reported in June 2008 that the microprocessor will have 16 cores, each with 16 threads, but published a roadmap in September 2009 showing 8 threads per core. During the Hot Chips 21 conference Sun revealed the chip has a total of 16 cores and 128 threads. According to the ISSCC 2010 presentation:
Floating Junction Gate- FJG
FJG RAM, short for Floating Junction Gate Random Access Memory, is the newest type of computer memory so far invented by Oriental Semiconductor Co., Ltd. The FJG RAM offers ultra-compact cell area as small as 4F2 (F is the feature size); capacitorless cell configuration; high performance operation as well as simple process. Moreover, it requires neither exotic process steps or materials, nor new process tools. The process of making such a device is simply available from all existing DRAM fabs. Due to its capacitorless property, the FJG cell process is more compatible with logic process, enabling its great potential not only in the standalone DRAM application but also the embedded-DRAM applications. Other merits such as non-destructive-read; shared sense-amplifiers can help DRAM designers to reduce the complexity of the periphery circuits.
Gulftown (microprocessor)
Gulftown or Westmere-EP is the codename of a six-core hyperthreaded Intel processor able to run up to 12 threads in parallel. It is based on Westmere microarchitecture, the 32 nm shrink of Nehalem. Originally rumored to be called the Intel Core i9, it is sold as an Intel Core i7. The first release was the Core i7 980X in the first quarter of 2010, while its server versions are the Xeon 3600- and 5600-series. The i7-970 has recently been released, with a 24x locked multiplier.
Bulldozer (processor)
Bulldozer is the codename AMD has given to one of the next-generation CPU cores after the K10 microarchitecture for the company's M-SPACE design methodology, with the core specifically aimed at 10 watt to 100 watt TDP computing products. Bulldozer is a completely new design developed from the ground up. AMD claims dramatic performance-per-watt improvements in HPC applications with Bulldozer cores. Products implementing the Bulldozer core are planned for release in 2011.
Future next-generation microprocessor AMD Fusion
AMD Fusion is the codename for a future next-generation microprocessor design and the product of the merger between AMD and ATI, combining general processor execution as well as 3D geometry processing and other functions of modern GPUs into a single package. AMD's merger with ATI closed on October 25, 2006. This technology is expected to debut in the second half of 2011, as a successor of the latest microarchitecture.
PowerPC A2
The PowerPC A2 is a massively multicore capable and multithreaded 64-bit Power Architecture processor core designed by IBM using the Power ISA v.2.06 specification. IBM calls products based on it PowerEN (Power Edge of Network) or a "wire-speed processor" and they are designed as hybrids between regular networking processors, doing switching and routing and a typical server processor, that is manipulating and packaging data. It was revealed February 8 2010, at ISSCC 2010.
Bobcat (processor)
Bobcat is a processor codenamed and designed by AMD. The processor's existence was revealed during a speech from AMD executive vice-president Henri Richard in Computex 2007 held in Taiwan; it is expected to be launched in Q4 2010. One of the major supporters was executive vice-president Mario A. Rivas who felt it was difficult to compete in the x86 market with a single core optimized for the 10-100 watts range and actively promoted the development of the simpler core with a target range of 1-10 watts. In addition, the core could migrate into the hand-held space by reducing the power consumption down to 250 mW.
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